Pulse width modulators (PWMs) are useful for many applications including communications, control applications such as motor controllers, and the like. A PWM receives an input number and provides an output pulse whose duty cycle is determined by the input number. A typical PWM includes a counter which counts the number of cycles of a clock input signal, an input register for storing the input number, and a comparator which detects when the counter reaches the input number in order to switch the output signal.
One desirable feature of PWMs is the ability to vary the period of the pulse width modulated output signal. A PWM in which this period is made a power of two of the clock input signal is termed a "2.sup.n PWM", where n corresponds to the number of bits of the input number. There are two known techniques to vary the period of the PWM. One technique uses a free-running counter (i.e., one which is not periodically loaded) and transfers the output of a selected counter cell to the comparator according to control signals. Another technique loads the counter with a value which is a function of not only the input number but also of control signals. For this counter when the count reaches a value determined by the input number and control signals, it is automatically reloaded. Obviously, both these techniques require different types of counters and additional logic to recognize when the counter reaches a desired value, and the counter must be large enough to handle all possible cases, which increases power consumption. What is needed is a PWM with reduced area and improved performance.